200MHz/330 DMIPS, MIPS M-class core DSP-enhanced core: Four 64-bit accumulators Single-cycle MAC, saturating and fractional math
Dual Panel Flash for live update support FPU for fast single- and double-precision math 12-bit, 18 MSPS, 40-channel ADC module Memory Management Unit for optimum embedded OS execution microMIPS mode for up to 35% code compression
